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Hybrid Core Processors

There is a recent trend towards multi-core processors in all the three computing domains: servers, desktop and Hand-held markets.
In server domain the examples are OpenSPARC T1 (8 cores x 4 threads/core = 32 threads) , T2 (8 cores x 8 threads/core = 64 threads) and PowerPC and POWER7 (8 cores x 4 threads/core = 32 threads).

Intel Core 2 Quad and AMD Quad core processors for desktop; For smartphone domain ARM Cortex A9 (dual core). 

Though in desktop space CISC architecture led by Intel is popular while in mobile and server space its a RISC domain. Moving forward, as we move towards 28 nanometer technology, the dice is heavily loaded in favor of RISC architecture.

Java is being used extensively in both Server space and in Smart Phones. For example, all Android application layer runs on a Java variant (Dalvik).

In multi-threaded machines like UltraSPARC and under network heavy loads, Java applications can tuned to run faster than C counterparts. That is, Java machines are well suited for CMT architecture.    

I am experimenting with JaM, a processor design that can natively execute Java Machine opcode. However, a pure Java machine has not been successful in past, due to the fact that the Java applications need to interact with OS and other components that are not implemented in Java. For example, in Android, the application layer runs on Java while the OS is Linux kernel and also has many other applications like SQLite
 
Thus, there is a need to pursue a hybrid core design. That is, Java machine cores should co-exist with traditional cores running C, C++ programs.

For JaM to co-exist with different processor architectures, different bus architectures must be supported, for example, with OpenSPARC it will be Cache Corssbar Switch (ccx), Wishbone for OpenCores, FSB (Front Side Bus) for Intel, AMBA for ARM architecture.





The views expressed on this blog are my own and do not necessarily reflect the views of my employer.
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